INTEL GUIDE FOR LGA1700 / LGA1851PDF · pages 7–8Pages 7–8

The Electrical Model

2.1 SVID, AC, DC and VRM Output

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Keep three levels distinct: the processor generates a request, the VRM physically powers the CPU, and monitoring shows the available telemetry. Using the same units does not make these quantities interchangeable.

From the CPU request to the external VRM
V/F + CONDITIONS AC adjusts the request → SVID REQUEST Not a Vcore sensor → VCCCORE VRM LLC changes droop → CPU POWER Telemetry is separate
SVID, AC, DC and VRM Output
ElementRole in This Method
V/F and SVIDV/F provides the basis for the relationship between frequency and voltage; SVID carries commands and data between the CPU and VRM. Other conditions also affect the operating request.
IA AC Load LineA parameter for load-dependent adjustment of the request. Reducing it is used here for undervolting; it is not a fixed offset to the entire V/F curve.
CPU LLCChanges the load-line characteristic of the VCCCORE VRM. Stronger compensation usually reduces steady-state droop, but changes transient response.
IA DC Load LineA parameter in the load-dependent droop model used by the processor for voltage and power accounting. It is not an IOUT adjustment or a separate undervolt.
Core VIDVID reported by the CPU. Not a physical Vcore measurement, and not necessarily a raw command that can be inserted directly into a VRM calculation.
VOUT / VcoreVOUT is a voltage reading from VRM telemetry; Vcore Die Sense is a separate motherboard measurement channel. Their agreement must be checked on the specific system.
CEPThis protection responds to droop relative to an internal threshold and may limit the load. An absence of errors does not rule out performance loss caused by its intervention.
DOCUMENTATION CONSULTED: Intel specifications and explanations; explanations by the HWiNFO author; ASUS BIOS guides and information. Intel VCCCORE, Intel CEP, HWiNFO: VID and DC Load-line, ASUS ROG Z790 BIOS Manual 7

2.2 What Can and Cannot Be Calculated

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Steady-State Operation

With adaptive control, the command itself changes with frequency, temperature and load. Dividing the voltage difference between idle and a stress test by the current difference, without controlling the request, therefore does not isolate the load-line resistance.

What Can and Cannot Be Calculated
QuantityWhat Is Actually KnownWhat It Does Not Establish
DC = 0.73 mΩThe DC value adopted for LLC5 from Table 3.2; also used in my profileA table value does not replace a measurement of transient response
IOUT = 244 AThis Current reading is present in the screenshotIt does not establish equality with the internal current estimate used for AC compensation
Core VID ≈ VOUTReadings are close in one operating conditionNo proof of exact DC calibration or an absence of overshoot
HWiNFO AC/DCReadback of programmable parameters, when availableNot a direct hardware measurement of power-rail resistance

Why the calculated 93 mV is not a measured undervolt

The arithmetic 244 A × (0.73 - 0.35) mΩ = 92.72 mV is correct. However, it describes a conditional case in which the current used for AC compensation is assumed to be 244 A and all other conditions are equal. These assumptions cannot be verified from the screenshot. The number is therefore not used to calculate ready-made AC presets or to promise identical VOUT at different LLC levels.

Handling DC in Practice

  • Select LLC and set the corresponding DC from Table 3.2. After boot, check the AC/DC values actually applied; Auto for DC is acceptable if readback shows the required table value.
  • After changing LLC, replace DC with the value for the new level and retune AC. Keep DC fixed when tuning AC or SVID offset: it is not an additional undervolting control.
  • Do not change CPU Current Reporting to hide power consumption. An incorrect DC model may indirectly change clocks through PL enforcement.
  • Measuring the physical load-line and fast overshoot requires suitable equipment. A software log helps check behavior, but does not replace that measurement.
DOCUMENTATION CONSULTED: Intel specifications and explanations; explanations by the HWiNFO author. Intel VCCCORE, HWiNFO: VID and DC Load-line, HWiNFO: Effective Clock 8