DDR5 GUIDE INTEL LGA1700 / LGA1851PDF · pages 73–81Pages 73–81

Performance tests and monitoring

8.1 What a benchmark actually measures

PDF · 73Page 73

For DDR5, evaluate bandwidth, latency, cache effects and performance in real workloads. Check stability using the method in Chapter 7.

A comparison is meaningful only within the same program and version, with identical CPU/Ring frequencies, Windows background load, cooling, and operating-system security-feature state.

FOUR DIFFERENT TYPES OF RESULTS

Table, PDF page 73
MetricWhat it showsWhat affects it most
ReadSpeed of reading data from memoryFrequency, IMC, Gear, channels, threads, and test implementation
WriteSpeed of writing data to memoryCPU/IMC architecture, frequency, timings, and algorithm
CopyData copy: reading followed by writingEntire memory path, cache, and working-set size
LatencyEnd-to-end access latency in nanosecondsAll timings, frequency, Gear, Ring/Uncore, and OS background activity

THREE LEVELS OF RESULT VALIDATION

Diagram, PDF page 73
2 3 REAL-WORLD TEST STABILITY 1 SYNTHETIC 7-Zip, Cinebench, or a CPU-limited game checks whether the gain reaches the actual workload. Chapter 07 searches for errors separately. A high score does not mean the profile is stable. AIDA64, MLC, or OCCT shows the limit of a particular algorithm.

RULE FOR THIS CHAPTER

Change one profile, keep the environment identical, and do not cherry-pick the best run. Do not count a difference smaller than the natural run-to-run variation as an improvement.

DOCUMENTATION REVIEWED: FinalWire AIDA64 benchmark methodology; consolidated measurement methodology of chapters 03-07.

8.2 AIDA64 EXTREME

PDF · 74Page 74
Diagram, PDF page 74

AIDA64 Cache & Memory Benchmark is a quick synthetic test for comparing profiles on the same system. According to the developer’s published description, Read/Write use a 64 MB block, while Copy transfers 32 MB and counts traffic in both directions. Latency uses random addresses within blocks.

HOW CACHE & MEMORY BENCHMARK WORKS

Diagram, PDF page 74

USEFUL TESTS FROM THE GENERAL BENCHMARK SECTION

Diagram, PDF page 74

Hardware Prefetcher on ASUS Z790 controls the MLC Streamer: it detects sequential accesses and fetches upcoming data into L2 ahead of demand. It is separate from Adjacent Cache Line Prefetch; the effect depends on the workload.

8.3 CPU-Z: settings and SPD

PDF · 75Page 75

CPU-Z records the system configuration: CPU and motherboard models, BIOS version, actual memory clock, active primary timings and each module's SPD contents.

MY CPU-Z TABS: WHAT TO SAVE WITH THE RESULT

1. CPU 2. MAINBOARD 3. MEMORY 4. SPD / SLOT 1

Diagram, PDF page 75
Diagram, PDF page 75
Diagram, PDF page 75
Diagram, PDF page 75

5. SPD / SLOT 2 6. BENCH 7. ABOUT

Diagram, PDF page 75
Diagram, PDF page 75
Diagram, PDF page 75

WHERE TO LOOK FIRST

Table, PDF page 75
TabWhat to checkHow to read it
CPU / MainboardModel, stepping, BCLK, motherboard, BIOS, and microcodeRecords the platform and CPU state for repeatability
MemoryDRAM Frequency, 4 x 32-bit, tCL/tRCD/tRP/tRAS/tRC, and CR4100 MHz x 2 = DDR5-8200; these are the active parameters
SPD for every slotCapacity, DRAM manufacturer, ranks, part/serial number, JEDEC, and XMPSPD stores module profiles, but does not prove that XMP is currently active
Bench / AboutQuick CPU score and exact CPU-Z versionBench does not test memory; save the version with the screenshot
DOCUMENTATION REVIEWED: Official CPUID CPU-Z 3.01 and Validator V3 documentation. Screenshots: my system.

8.4 HWiNFO: monitoring

PDF · 76Page 76
Diagram, PDF page 76

HWiNFO is my primary and, in my view, the best monitoring tool. It simultaneously shows module temperatures, actual* voltages, CPU/Ring frequencies, throttling, and WHEA counters.

* The readings are estimates: PMIC telemetry may be inaccurate. Actual voltage and ripple are checked with an oscilloscope.

MINIMUM SENSOR SET

Table, PDF page 76
ReadingWhat to saveImportant nuance
SPD Hub TemperatureCurrent, Maximum, and Average for each DIMM separatelyThis is the SPD Hub temperature, not the temperature of the DRAM dies themselves
VDD / VDDQReadings from both modulesWhen supported; recheck anomalies with PMIC and software limitations in mind
Memory TimingsMemory Clock, Gear, and active timingsQuick check that the system loaded the intended profile
CPU / RingFrequencies, power limits, and indications of throttlingA different CPU mode changes benchmark results
WHEACounter before and after the runAn increase requires diagnosis, but does not automatically implicate RAM

MY WORKING SENSORS SCREEN

Diagram, PDF page 76
DOCUMENTATION REVIEWED: HWiNFO 8.55 documentation and developer guidance on SPD Hub Temperature and WHEA. Screenshots: my system.

8.4.1 HWiNFO: the Memory Timings window

PDF · 77Page 77

In addition to the basic Memory Timings section in Sensors, HWiNFO can open a separate ‘Memory Timings’ window with an expanded set of active memory parameters. This is convenient for checking the values actually applied after memory training, including AUTO settings calculated by the platform.

In Sensors-only mode, the window is available from the context menu of the HWiNFO notification-area icon.

WHAT THE SEPARATE WINDOW ADDS

Additional secondary, tertiary, and turnaround timings: tFAW, tRRD_S/L, tWTR_S/L, tRDPRE, tRDPDEN, tWRPRE, tWRPDEN, tRDRD/tRDWR/tWRRD/tWRWR sg/dg, and others; plus some internal parameters, including RTL. The available fields depend on the platform and HWiNFO version.

Diagram, PDF page 77

HWiNFO: advanced memory timings and SPD write-protection status

DOCUMENTATION REVIEWED: HWiNFO: DIMM SPD Write-Protection Management; screenshot version 8.55-6095. HWiNFO — developer explanation of SPD protection

8.5 ASROCK TIMING CONFIGURATOR

PDF · 78Page 78

ASRock Timing Configurator 4.1.7 is a convenient utility for viewing active primary, secondary, and tertiary timings directly in Windows. It provides a compact record of settings, including on compatible ASUS motherboards.

MY DDR5-8200 PROFILE ON Z790 APEX ENCORE

Diagram, PDF page 78

WTR calculations depend on the utility version; DDR4/DDR5 formulas and corrections are compared in 3.7.

DOCUMENTATION REVIEWED: Official ASRock Timing Configurator 4.1.7 CDN and ASRock FAQ 505. Screenshot: my system.

8.6 pyhwinfo: low-level memory and IMC settings

PDF · 79Page 79

pyhwinfo 0.8 dev is a low-level diagnostic utility for DDR5 overclocking. It reads applied memory and IMC parameters that ordinary monitoring shows only partially or not at all.

WHAT IT LETS YOU CHECK

MCLK / UCLK / BCLK (interface fields), memory data rate, and Gear Mode; primary / secondary / tertiary timings by channel and MC0/MC1; RTL; ODT (Wr, Park, ParkDqs, NomRd, NomWr, and others); Vref; SA VID, VDDQ TX, AC_LL / DC_LL; DIMM, SPD / PMIC, and available module voltages and temperatures.

After Memory Training, it lets you compare BIOS settings with the values actually applied. Checking AUTO, tertiary/turnaround timings, RTL, ODT, and Vref is especially useful because the platform calculates them during training.

Diagram, PDF page 79

pyhwinfo: low-level DDR5 and memory-controller parameters

Screenshot shows v0.5 (dev): MC/PCH Settings section; separate Vref and AC_LL/DC_LL values are not shown here.

SOURCES: pyhwinfo README and source code (September 11, 2026); OCN — link to the dedicated discussion. GitHub — pyhwinfo / remittor OCN — pyhwinfo: open-source tool for showing memory timings

8.7 ASUS MEMTWEAKIT

PDF · 80Page 80

ASUS MemTweakIt shows more internal parameters than the compact ATC. On my Z790 Apex Encore, four tabs collect the primary, secondary, and tertiary timings, refresh behavior, scheduler, and RTL. In this manual, I use it to capture a detailed record of settings.

FOUR PAGES OF ONE DDR5-8200 CONFIGURATION

TIMINGS #1 / PRIMARY TIMINGS #2 / REFRESH

Diagram, PDF page 80
Diagram, PDF page 80

TIMINGS #3 / SCHEDULER TIMINGS #4 / RTL

Diagram, PDF page 80
Diagram, PDF page 80

WR calculations depend on the MemTweakIt version; the old and DDR5 formulas are compared in 3.7.

DOCUMENTATION REVIEWED: ASUS MemTweakIt manuals; HWBOT Z790 Apex community build and discussion. Screenshots: my system.

8.8 Current alternative benchmarks

PDF · 81Page 81

AIDA64 is usefully supplemented with one independent synthetic test and one real-world test. Results from different programs cannot be converted into one another: each uses its own working set and algorithm.

Table, PDF page 81
ToolWhat it measuresWhen usefulLimitation
Intel MLC 3.13Bandwidth and latency under increasing loadIn-depth IMC and memory analysisCLI; record launch parameters
OCCT 17.1.8Latency & Bandwidth L1/L2/L3/RAMModern graphical alternative to AIDA64Compare OCCT only with OCCT
7-Zip 26.04Compression/Decompression LZMAReal-world response of CPU, cache, and RAMSame dictionary and thread count
Cinebench 2026Redshift scene rendering on the CPUCPU score; tight timings sometimes add a few pointsNot a memory test; gains may be within run variance
CapFrameX / PresentMonFrame time, average FPS, and low percentilesBenefit in a CPU-limited gameA GPU limit hides the effect
RTP BenchmarkRead/Write/Copy and random-access latencyAn additional data point within RAM Test ProMethodology still developing

8.9 STANDARDIZED PROTOCOL: MAKING THE NUMBERS REPRODUCIBLE

PDF · 81Page 81
Table, PDF page 81
StepActionWhat to record
1Prepare an identical environmentBIOS, Windows, program versions, power, background activity, and cooling
2Record the configurationCPU-Z Memory/SPD and an ASRock Timing Configurator screenshot
3Open HWiNFO SensorsSPD Hub, VDD/VDDQ, WHEA, CPU/Ring, and throttling
4Run five passesSame test order, pauses, working set, and warm-up
5Calculate the median and spreadDo not use the best run; do not count a small difference as a gain
6Confirm with a workload7-Zip, Cinebench, or a game; Chapter 07 searches for errors separately
DOCUMENTATION REVIEWED: Intel MLC 3.13; OCCT 17.1.8; 7-Zip 26.04; Cinebench 2026.1.3; CapFrameX; Intel PresentMon; RAM Test Pro: benchmark documentation.